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Feldstein SPARC-V9 Simulator

Cosmic Horizon is designing a cycle-based SPARC simulator. This simulation program will be useful for design verification testing, where a user-supplied pre-silicon functional/structural SPARC processor model is the design under verification (DUV). The simulation program's SPARC model includes the SPARC-V9 Standard Reference Model. The program enables the user-supplied DUV to be directly incorporated in the simulation program's SPARC model. Verification of the DUV will be accomplished by comparing its state with that of the reference model.

The implementation language of the Feldstein SPARC-V9 Simulator is Java. David Yen, Executive Vice President of Sun Microsystems Microelectronics group, has said that Rock, for example, "will provide hardware features to do Java acceleration", something a Java-based simulator would obviously benefit from. The 64-bit integer primitive type motivated the language choice, but another advantage is portability, allowing the simulator to be demonstrated to practically anyone.

Cosmic Horizon is also designing and developing a sample DUV, the Sputnik microprocessor, using Brigham Young University's JHDL. Current work focuses on integer addition (SPARC ADD instruction) and integer multiplication (SPARC MULX instruction).

FSS relates to the OpenSPARC community. Any SPARC-V9 implementation, including the OpenSPARC T1 processor, can be described by a functional/structural model in JHDL. In parallel with FSS development, Cosmic Horizon is actively working to automate the translation from Verilog RTL to JHDL, by contributing to both Icarus Verilog and Confluence. The OpenSPARC T1 processor is the subject of this experiment. Follow the progress in Alan Feldstein's Blog.

Of course, FSS isn't just for OpenSPARC and Sun Microsystems. In particular, Cosmic Horizon welcomes Fujitsu Limited to try FSS. In fact, this application suite is for anyone involved in SPARC-V9 microprocessor design. SPARC is, after all, an open standard.

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See Also

SPARC International, Inc.
The Stanford Rapide Project
Technical SPARC CPU Resources
Get the source Free! OpenSPARC
Graphical Microcode Simulator with a Reconfigurable Datapath
Collaborative Process Improvement