2010-08-09: My silence doesn't mean I'm not doing anything
Let me say a little about choice of compilers for Icarus Verilog development. Then I'll bring you up to date on latch synthesis.
2010-07-09: Like Emerging From a Coma
P90X, a 90-day program that I started 2010-04-08, has caused an unprecedented disruption of my work for Cosmic Horizon. Other activities share the blame. I concluded my 2-year study of Japanese on 2010-05-13. And it's baseball season. Being the organizer of Austin MLB comes with some responsibilities, but I've recently managed to get the time expenditure to a reasonable level.
As I come back to work, it's a lot like emerging from a coma.
The Software Requirements Specification doesn't say much about the SPARC-V9 Standard Reference Model (see Section 1.7.2).
I think the reference model should run in another thread. The monitor idea previously discussed (i.e. a monitor that watches instructions fetched by the DUV) may not be bad. Given that we are taking a black box approach, we can still gather information about that which is necessary (although perhaps not sufficient). If we are monitoring the DUV's instruction addresses as they are read from memory, then it is necessary for the address to appear on the bus before the instruction at that address to can be executed, although this is insufficient evidence to prove that the instruction has been fetched into the core, let alone executed and committed.
Monitors are self-contained components that observe e.g. inputs to the DUV for scoreboard updates.
What kind of UML diagram would be good here?
communication diagram
As I come back to work, it's a lot like emerging from a coma.
The Software Requirements Specification doesn't say much about the SPARC-V9 Standard Reference Model (see Section 1.7.2).
I think the reference model should run in another thread. The monitor idea previously discussed (i.e. a monitor that watches instructions fetched by the DUV) may not be bad. Given that we are taking a black box approach, we can still gather information about that which is necessary (although perhaps not sufficient). If we are monitoring the DUV's instruction addresses as they are read from memory, then it is necessary for the address to appear on the bus before the instruction at that address to can be executed, although this is insufficient evidence to prove that the instruction has been fetched into the core, let alone executed and committed.
Monitors are self-contained components that observe e.g. inputs to the DUV for scoreboard updates.
What kind of UML diagram would be good here?
communication diagram
2010-03-12: OpenSPARC synthesis with Icarus Verilog
"And hopefully I will have the good sense to excuse myself [from building and testing Icarus Verilog on 64bit Solaris/SPARC] if this work detracts my attention too much from Cosmic Horizon's OpenSPARC objectives."
Let me take you from my last Icarus Verilog blog item up to the present.
Let me take you from my last Icarus Verilog blog item up to the present.
2010-02-11: Does anybody really know what time it is?
The next line from that song is, "Does anybody really care?". Well, the SPARC-V9 Standard Reference Model doesn't care.
2010-01-11: Solaris Installation Hell
One problem with running a small business is that there is often no one to whom to delegate the tasks that interest me least. While I have heard from some of you about the downside of depending on system administrators, in my opinion there is more upside than downside.
2009-12-09: I think monitors belong in the "view"
I wrote that in my last blog about FSS. And I'm still working on the refactoring, letting the compilation failures tell me what work remains. Obviously, since so much time has elapsed without completing this, my current focus is on the other project, but that will change eventually.
The only thing in my notes for the period was a 2009-09-04 entry reminding me to "Guard against writes to memory before POR."
The only thing in my notes for the period was a 2009-09-04 entry reminding me to "Guard against writes to memory before POR."
2009-10-26: Outrageous Sin
I had an experience with a restaurant in Austin TX USA that I would like to share with this large audience. If you live in or plan to visit Austin, please read. Otherwise, there's not much point.
Please never go to The Hub as long as you live. Here's why.
Please never go to The Hub as long as you live. Here's why.
2009-09-25: My Big Mouth and I
Just as I was getting back into what I want to do with Icarus Verilog, I saw a message thread: [Iverilog-devel] Need Icarus test on a 64 bit machine.
2009-08-24: Still Sidetracked
Yes, I was sufficiently recovered from surgery to write SPARC-V9 Standard Reference Model on 2009-06-23. I'm amazed that I was able to do that much that day. Right after that, I came down with a severe cold that put me right back in bed, so June was nearly a complete loss.
Then on 2009-07-08, I started Japanese 2, an accelerated summer course at Austin Community College. That turned my schedule upside down until 2009-08-13. Why am I studying Japanese? I specialize in SPARC-V9 and have developed significant expertise. Fujitsu Limited is a major player in the world of SPARC-V9. They design their SPARC64 microprocessors in Kawasaki, a suburb of Tokyo.
Adding to the squeeze, when Sun's stock price goes up, I spend more time on OpenSPARC, borrowing from the time allocation for FSS. JAVA is up.
That's enough with the excuses. Let me tell you what progress I have been able to make.
Then on 2009-07-08, I started Japanese 2, an accelerated summer course at Austin Community College. That turned my schedule upside down until 2009-08-13. Why am I studying Japanese? I specialize in SPARC-V9 and have developed significant expertise. Fujitsu Limited is a major player in the world of SPARC-V9. They design their SPARC64 microprocessors in Kawasaki, a suburb of Tokyo.
Adding to the squeeze, when Sun's stock price goes up, I spend more time on OpenSPARC, borrowing from the time allocation for FSS. JAVA is up.
That's enough with the excuses. Let me tell you what progress I have been able to make.
2009-07-24: What a Pain in the Ass!
I finished reading Pragmatic Version Control Using Git by Travis Swicegood, from the beginning of the book through Chapter 7 "Working with Remote Repositories". That should have given me all I needed to figure out how to get back in sync with Icarus Verilog, a project to which I had been contributing and intend to continue. The book's Section 7.3 "Keeping Up-to-Date" is most relevant, but that section is quite thin, less than a page long. I had been having a "git pull" failure. Although the book improved my understanding of Git, for this specific failure I was still on my own.
