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getWire(int)
.
getWire(Cell, int)
.
getWire(int, String)
.
getWire(Cell, int, String)
.
init(num_of_wires)
.
initWireFromArray(Wire[])
instead, which takes most significant
bit in slot 0
range
or variant.
Nameable
as it needs to know whether the
Nameable thing it is currently looking at is the root or not.
Wire(parent, num_of_wires, name)
.
Wire(Cell, Wire[], String)
, which has most significant bits in slot 0
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